ASML Investor Day takeaways: DRAM’s road ahead

It’s the DRAM roadmap, not the logic one, that’s most impacted by the rise of AI, ASML CEO Christophe Fouquet said at his company’s Investor Day, held 14 November in Veldhoven. And while no one knows exactly how the working memory technology will evolve, it will be to the benefit of ASML. The Veldhoven-based equipment maker projects spending on EUV tools for DRAM manufacturing to grow 15-25 percent CAGR in the 2025-2030 time frame, driven partially by an accelerating 22 percent CAGR bit growth (up from 18 percent in 2015-2023) and partially by an increasing number of EUV exposures per die (from 5 in 2025 to 7-10 in 2030, less if high-NA is deployed).

At first glance, the accelerating EUV sales growth in the DRAM realm may seem surprising, considering the fact that the pace of shrinking DRAM features has drastically slowed compared to logic. According to Semiaccurate, these days, DRAM density doubles once every decade, whereas logic makers still manage to squeeze out a 30-40 percent density improvement every two years. At the same time, as a commodity, DRAM is extremely cost-sensitive. Cost increases, as seen in leading-edge logic, are “a luxury DRAM manufacturers can’t afford,” Fouquet said. Memory hasn’t quite entered a post-Moore world, but it’s harder than ever to move forward.