Headlines
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Fab construction on the rise to meet AI demand
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ASML considers further capacity expansion beyond existing growth plans
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Eindhoven-based chip designer Sciosense acquired by China’s Fortior
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Dutch high-tech sector calls for lasting successor to Growth Fund
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Spectacell raises 6 million euros for chip-based cell imaging
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Globalfoundries targets physical AI with new FD-SOI platform
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Besi and Applied deepen packaging collaboration
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Xiver secures €28M for production expansion
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Report calls for blanket ban on DUV immersion exports to China
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ASML’s Jos Benschop joins TNO supervisory board
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Imec to test Alixlabs’ pitch-splitting process on full wafers
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Dutch detectors to help NASA telescope see faint infrared sources
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Eurofiber and Delft Networks prepare quantum link between Delft and Rotterdam
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European software coalition calls for €1B in research funding
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NXP-VIS joint venture weighs second Singapore fab
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McKinsey raises 2030 chip market forecast to $2.3T
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Twente puts superconducting magnetic sensor atop nanopyramid
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National investment institute seeks more capital
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CEO change at anode producer E-magy
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AI drives high-end packaging market past $51B by 2031
Editorial
AI safety: Engineering can’t fix what science doesn’t understand
AI top dog Jensen Huang is confident that engineers can and will tame AI’s risks. That confidence is misguided.
Opinion
Machines that think: AI in the lab
This is the eighth part in a series on how AI is crossing out of software and into the physical world. This time, Jan Bosch looks at AI-driven discovery.
Background
Outsourcing wafer handler to VDL ETG fails, ASML takes back full control
Around 2012, key supplier VDL ETG assumed full product responsibility for ASML’s wafer handler. The mission failed.
Editorial
Less spreadsheets, more courage
VDL ETG was capable of pulling off the wafer handler job for ASML, but the willingness to invest simply wasn’t there.
Background
Thermal ageing in molded power inductors: a hidden reliability risk
Why a stable inductance value doesn’t always guarantee stable performance at high temperature and high frequency.
Analysis
High-NA wasn’t quite finished after all
A design decision for high-NA lithography that ASML had to make before EUV had even proved itself has proved troublesome for logic makers.
Background
Trustworthy AI for IC sign-off and manufacturing
As artificial intelligence moves deeper into semiconductor workflows, trust is becoming one of the last barriers to broad industry adoption. In IC design-to-sign-off, the most valuable AI systems won’t be the most autonomous, but the most transparent, governable and reliable.
Top job
Events
Courses
Background
Value determination, strategic alignment and benefit management
Derk-Jan de Grood explains how a value framework helps determine the relative value of backlog items, how this value assessment can be aligned with organizational goals and strategic ambitions, how stakeholders can be involved in the prioritization decisions and how the value predicted upfront can be checked against the benefits realized upon delivery.
News
Tusk IC receives €15M to scale satellite chip production
Antwerp-based chip developer Tusk IC is ready to move its satellite chips into mass production after raising 15 million euros from investors.
Background
“You need to understand where the limits of different actuators lie”
A developer of advanced production automation like IMS needs to have a solid grasp of the possibilities and limitations of the various components used in high-tech machines. Roy Kelder, R&D engineer at the Almelo-based company, decided to expand his knowledge of actuators by taking the course “Actuation and power electronics.”
News
ASMPT develops latest-generation hybrid bonder in Beuningen
ASMPT is developing its new generation of hybrid bonders in Beuningen as part of increased investment in advanced packaging in the Netherlands.
News
Imec pushes superconducting computing toward CMOS-scale integration
Imec has taken another step toward making superconducting processors manufacturable at semiconductor scale. The institute’s latest NbTiN process combines record integration density with ultrafine wiring, addressing one of the technology’s biggest barriers to adoption.
News
TSMC and ASML rally chip industry behind larger photomasks for high-NA EUV
TSMC and ASML are kicking off an industry-wide effort to double the size of high-NA EUV photomasks, a move expected to boost scanner productivity by around 40 percent.
News
TNO calls for a system-centric industrial policy
Industrial policy should mirror the AI-driven shift toward system-level architectures, TNO argues.















