Imec demonstrates wafer-scale GaAs lasers on silicon

Imec has managed to monolithically integrate GaAs laser diodes on 300-millimeter silicon-photonics wafers. This breakthrough opens the door to cost-effective, high-performance optical devices for applications in data communications, machine learning and artificial intelligence.

As silicon itself is incapable of efficiently generating light, direct epitaxial growth of high-quality III-V optical gain materials on silicon has been a longstanding dream in the world of integrated photonics. Although hybrid or heterogeneous flip-chip technology, micro-transfer printing or die-to-wafer bonding are viable alternatives, they may not always be an optimal solution.

Stacking silicon and III-V materials on top of each other is troublesome, however, because of their large mismatch in crystal lattice parameters and thermal expansion coefficients. The resulting formation of crystal defects is known to deteriorate laser performance and reliability. Imec has employed the so-called selective-area growth (SAG) technique combined with aspect-ratio trapping (ART) to significantly mitigate this phenomenon by confining misfit dislocations within narrow trenches etched in a dielectric mask.

“Over the past years, Imec has pioneered nano-ridge engineering, a technique that builds on SAG and ART to grow low-defectivity III-V nano-ridges outside the trenches. This approach not only further reduces defects but also enables precise control over material dimensions and composition,” says Bernardette Kunert, scientific director at Imec. The Leuven-based research institute demonstrated III-V nano-ridge engineering by fabricating electrically pumped GaAs-based lasers on standard 300 mm silicon wafers, working on a CMOS pilot manufacturing line.

“The cost-effective integration of high-quality III-V gain materials on large-diameter Si wafers is a key enabler for next-generation silicon-photonics applications. These exciting nano-ridge laser results represent a significant milestone in using direct epitaxial growth for monolithic III-V integration. This project is part of a larger pathfinding mission at Imec to advance III-V integration processes toward higher technological readiness, from flip-chip and transfer-printing hybrid techniques in the near term, over heterogeneous wafer- and die-bonding technologies and eventually direct epitaxial growth in the longer term,” says Joris Van Campenhout, silicon photonics fellow and director of the industry affiliation R&D program on optical I/O at Imec.