Intel claims its upcoming 18A node provides over 30 percent density scaling, 18-25 percent performance improvement or 36 percent lower power use compared to Intel 3. The advancements have been realized through “industry-first combination and optimization of advanced interconnects, a gate-all-around (GAA) transistor architecture, backside power and design co-optimization,” according to a paper published at the 2025 Symposium on VLSI Technology and Circuits.
Until actual chips are released, it’s impossible to put these numbers in perspective. SRAM density is currently the only point of comparison to TSMC’s N2 process. Intel reports a 0.021 µm2 SRAM bit cell, whereas the Taiwanese foundry claims 0.0175 µm2 for N2, which is also nearing the kick-off of high-volume manufacturing. The numbers depend on the prime purpose of the process, however – for example, a sub-node may prioritize density and another power use.
The first 18A chip, the Panther Lake notebook CPU, is expected to hit the shelves late this year, though significant numbers will have to wait until 2026. AMD has scheduled several N2-made products for 2026 as well.
