A design decision for high-NA lithography that ASML had to make before EUV had even proved itself has proved troublesome for logic makers.
TSMC has come around. After a string of critical – and widely discussed – comments about its high price, the Taiwanese will start high-NA volume production in 2030. Despite all the drama, the world’s largest foundry is therefore pretty much falling into line. Intel may be starting two years earlier, but Samsung’s foundry division has roughly the same timeline in mind. In terms of wafer volumes, however, it’s the DRAM manufacturers, including Samsung, that will do the heavy lifting. They’ll start ramping high-NA in earnest from 2028.
That makes all the pieces of the puzzle fall into place. After several difficult years, Intel was willing to shoulder the costs and risks of being an early adopter to reassert its technological leadership. Memory manufacturers are also quick to embrace high-NA because they expose smaller dies. That means they don’t have to stitch together two ‘half dies’ to compensate for high-NA’s exposure field being half the size of the standard EUV field. This drawback follows directly from the properties of high-NA optics.
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