European chip start-up Vertical Compute has expanded its partnership with Imec to validate a 40 nm test chip and prepare its first 16 nm preproduction chip. A commercial foundry will fabricate the logic, after which the research institute will add Vertical Compute’s proprietary magnetic memory layer on its EU-funded NanoIC pilot line in Leuven. The project moves the collaboration beyond an initial R&D services agreement to joint engineering.
Vertical Compute stores strings of magnetic bits in vertical columns built directly above the logic transistors. Each column can hold multiple bits, increasing storage density without taking up more area on the chip. Placing the memory above the logic also shortens the electrical connections between them, reducing the energy needed to move data compared with sending it to and from a separate memory chip.
Conceptually, vertical integrated memory (VIM) isn’t unlike old-fashioned tape storage, but without any moving parts. The columns of magnetic material store ones and zeros according to the direction in which they’re magnetized. Electrical pulses shift the magnetic pattern along the column until the desired bit reaches a readout element, which senses its state as a change in electrical resistance.
The 16 nm chip will test whether Vertical Compute can combine a standard commercial foundry process with its own memory integration step. The company hasn’t named the foundry or announced a timetable for volume production.
“The defining limit on AI scaling today isn’t processing power; it’s the exponential cost and energy of moving data. Taking our VIM from a breakthrough concept to 16 nm production requires world-class ecosystem alignment. Partnering with Imec proves that we can build and scale the next generation of highly efficient AI infrastructure right here in Europe, providing global markets with the hardware needed to sustain the AI revolution,” says Sylvain Dubois, co-founder and CEO of Vertical Compute.
