Nearfield has introduced a measurement mode that allows chip manufacturers to measure the sidewalls of nanostructures in 3D during production. This method should improve process control in increasingly complex 3D chip architectures.
The sidewall imaging mode was developed for Nearfield’s flagship metrology system, the Quadra. This mode allows manufacturers to characterize deep and narrow structures with a high aspect ratio. These are increasingly common in modern chip architectures and difficult to measure with existing metrology techniques. Examples include nanosheet transistors and gate-all-around structures.
Although techniques such as transmission electron microscopy (TEM) can show cross-sections of nanostructures, such measurements require a thin lamella to be removed from the wafer. Due to this destructive nature, TEM is mainly used for process development and error analysis. The sidewall imaging mode, on the other hand, can measure directly on the wafer, without cutting it open.
According to Nearfield, the so-called hammerhead probes used for these measurements aren’t new within the AFM community. The firm’s innovation stems from the way the system deals with the forces acting on the probe when it measures deep into nanoscale structures. In conventional AFM measurements, these lateral forces often cause measurement errors and biases. In the new sidewall imaging mode, the forces are used to accurately characterize the sidewalls of structures.
In addition to measuring recesses in nanosheet transistors, the method can be used for other critical structures, such as narrow trenches and scallops. Such structures are used, among other things, in advanced chip processes around EUV and high-NA-EUV lithography. Deviations in sidewall uniformity can limit chip yield in these processes.
