Samsung introduces 1.4nm process for 2027

Samsung unveiled its logic roadmap last week, detailing the processes that will be on offer in upcoming years. The 2nm-class SF2Z node incorporating backside power delivery network technology (BSPDN) as well as the 1.4nm-class SF1.4 node are scheduled to enter mass production in 2027. Until that time, the Korean foundry will offer 4nm FinFET and 3nm and 2nm GAA processes.

BSPDN places power rails on the backside of the wafer to eliminate bottlenecks between the power and signal lines. Samsung says that applying BSPDN technology enhances power, performance and area (PPA) compared to the first-generation 2nm nodes but also significantly reduces voltage drop (IR drop), enhancing the performance of HPC designs.

TSMC’s version of BSPDN, called Super Power Rail, is expected to be used in the A16 process, scheduled for mass production in 2025. Intel’s Powervia is part of its 20A process, which debuts this year already.