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Axelera secures up to €61.6M grant to develop scalable AI chiplet for HPC

6 March 2025
Nieke Roos
Editor-in-chief at Bits&Chips
Reading time: 2 minutes

Eindhoven-headquartered Axelera AI has unveiled a high-performance, energy-efficient and scalable AI inference chiplet dubbed Titania. To support the development, the scale-up is receiving up to 61.6 million euros in funding from the EuroHPC Joint Undertaking (JU) and member states as part of the Digital Autonomy with RISC-V for Europe (DARE) project to establish a world-class supercomputing ecosystem on this continent. This will allow the company to grow its R&D teams in the Netherlands, Italy and Belgium. The new funding brings the total amount raised by Axelera to more than 200 million dollars in just three years.

The Titania builds on Axelera’s innovative digital in-memory computing (D-IMC) architecture, which provides near-linear scalability from the edge to the cloud. “Our D-IMC technology leverages a future-proof, scalable multi-AI-core architecture, ensuring adaptability and efficiency. Enhanced with proprietary RISC-V vector extensions, this mixed-precision platform is engineered to handle diverse AI workloads,” explains CTO and co-founder Evangelos Eleftheriou. “Our architecture facilitates scaling from the edge to the cloud, streamlining expansion and optimizing performance in ways that traditional cloud-to-edge approaches cannot.”

With the Titania chiplet-based architecture, Axelera aims to meet the increasing AI demands across various market sectors, including high-performance computing (HPC), enterprise data centers, robotics, automotive and others, while maintaining the efficiency of an edge-oriented architecture. Leveraging D-IMC allows for near-linear scalability in performance without the significant power and cooling overhead typical of other solutions. Integrating RISC-V technology with vector extensions enables Axelera to rapidly innovate in response to evolving customer needs. Multiple Titania chiplets will be combined in a system-in-package (SiP).

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