Background

High-NA lithography: the shrink continues

Reading time: 3 minutes

Even if the historical trend has slowed down, shrinking device features continues to pay off. Hence the need for ASML’s high-NA lithography scanners.

Often described as a doubling of the number of components on a chip every two years, the original formulation of Moore’s Law is more explicit about its economic nature: the growing complexity of circuits made of minimum-cost components. By increasing transistor density, the economics of chip manufacturing is improved. Essentially, Moore’s Law is about transistor density increasing faster than the cost of manufacturing a finished wafer.

This, in itself, underpins technological progress: the same chip will be cheaper to manufacture two years later, or a better one can be made at roughly the same cost. As a bonus – this isn’t discussed in Moore’s original paper – shrinking features boost performance at constant power or enable lower power use at constant performance (but only up to a point).

This article is exclusively available to premium members of Bits&Chips. Already a premium member? Please log in. Not yet a premium member? Become one for just €20 for the first year and enjoy all the benefits.

Login

Related content