It’s only a matter of time before TSMC starts ordering high-NA tools, is ASML’s message. Once the technology reaches full maturity, high-NA will become more cost-effective than low-NA multiple patterning.
It appears that ASML and TSMC are negotiating through the media. TSMC does not want to buy high-NA machines, ASML points to the biggest underperformer in the chip industry in a press release: look, Intel does want our top machine.
TSMC is publicly saying that ASML’s newest EUV scanners are too expensive. We have to counter that with something, they must have thought high up in the Veldhoven tower. The introduction of high-NA into volume production at Intel offered a perfect opportunity. For Intel as well. The US chip manufacturer has to pull out all the stops to restore its damaged reputation, so one plus one equals two.
At the same time as its half-year results, ASML therefore issued a press release that included a positive statement from Naga Chandrasekaran, executive vice president and general manager of Intel’s factory division: “This milestone reflects the close technical collaboration between Intel and ASML and shows how high-NA EUV can be integrated into advanced semiconductor manufacturing at scale.”
Wrong choices
That Intel is so eager to cooperate in promoting high-NA is understandable. Over the past quarter-century, it has pursued a wavering policy when it came to lithography. The result of this accumulation of wrong choices has been the loss of market leadership and stock market value.
Intel was the world’s largest chip manufacturer for a long time. When it came to lithography, everyone looked to the Silicon Valley giant. Around the turn of the millennium, it was the major driving force behind EUV. In the end, however, Intel chose to bet everything on multiple patterning with immersion lithography instead of EUV — in hindsight, one of the biggest blunders in the semiconductor industry.
The result was that the Americans fell so far behind that they had to have their most advanced chips manufactured in Taiwan. Incidentally, for a long time, TSMC also manufactured the application processors for Samsung’s Galaxy phones because Samsung, too, failed to get EUV on track in Korea.
Watch out
ASML’s message is therefore clear: TSMC, watch out. Intel is investing aggressively in advanced technology and, with its foundry business, is trying to lure your customers away. So far, the reaction in Taiwan has been cool; for the time being, high-NA is not on the roadmap there.
During the discussion with analysts following the half-year results, Christophe Fouquet pointed out that it would only be a matter of time before TSMC started using high-NA, although he did not mention the company by name. Responding to a question about high-NA being too expensive, he argued that this was only temporary. High-NA will become more mature and ultimately more attractive than low-NA multiple patterning. “We are still basically working on bringing the high-NA platform to the level of maturity of low-NA,” Fouquet said. Once ASML achieves that, high-NA will offer a cost advantage over the existing technology, he added. High-NA “gets implemented when the platform reaches the right maturity,” Fouquet underscored.
It looks as if Intel is willing to carry the heavy burden of pioneering high-NA, while TSMC is taking a more relaxed position.
Different game
Who should we trust most when it comes to lithography strategy: a product company that could no longer keep up with Moore’s Law and whose revenue declined during the AI boom, or a foundry that dictates the pace of the semiconductor industry and currently manufactures virtually all advanced chips and silicon systems?
My assessment is that a very different game is taking place behind the scenes. Just look at the comments Christophe Fouquet made about market trends in logic chips during the half-year results meeting. The CEO of the lithography company did not mention TSMC by name, but that company currently manufactures 90 percent of the world’s most advanced silicon.
Fouquet said that logic manufacturers (read: TSMC) are currently developing chip processes for the 1.4-nanometer node while also investing in 2- and 3-nanometer capacity for the latest generation of AI accelerators. But it does not stop there. The Taiwanese are also continuing to invest in 4- and 5-nanometer chips that support the most advanced processors and ASICs in AI systems. As a result, the number of systems ASML is delivering this year is growing by more than 25 percent.
That lithography systems are needed at every technology level also became apparent from ASML’s requests to suppliers. In recent months, the equipment manufacturer informed its suppliers that it will need more parts next year than previously forecast.
When it comes to a winning lithography strategy, we should no longer focus exclusively on the most advanced process nodes. The trade-off between low-NA EUV with multiple patterning and fewer exposures with high-NA EUV is important. But I estimate that the commotion surrounding high-NA is mainly intended to keep share prices high. Investors are eager to hear about new generations of machines that can shrink features even further — most of them still live in the two-dimensional world of Moore’s Law.
Heterogeneous integration
Meanwhile, another trend is having an even greater impact on margins, system performance and costs. That game is called heterogeneous integration. Hybrid bonding in particular is a game-changer. The technology enables chip manufacturers to intelligently combine chips produced in different process nodes. The result is silicon systems with performance comparable to — or even better than — that of a monolithic 2D chip.
It is an extraordinarily complex puzzle to find the best balance in these systems. Which parts should chip manufacturers such as TSMC and SK Hynix produce in which process node, and how should system companies such as Apple, Broadcom, Marvell and Nvidia combine them? It is a complicated optimization problem with many variables, including yield, performance, process costs, thermal management and many more.
That the use of hybrid bonding is set to increase exponentially was illustrated by Besi last June during its annual Investor Day. At the moment, there are only a few hundred hybrid bonders installed worldwide, mainly at TSMC. Besi expects that number to grow to between 1,150 and 2,200 systems by 2030 and already has the manufacturing capacity to produce 300 of these machines.
It’s not without reason that ASML is now figuring out what role it wants to play in 3D integration. But whichever way you look at it, revenues are likely to rise in the coming years — regardless of whether high-NA accounts for a large share of that growth or not.
