High-NA EUV tool in Veldhoven will start churning out wafers 24/7

“I see a defect!” teased Intel’s Ann Kelleher as she optically inspected the symbolic first ‘high-NA wafer’ that had just ceremonially been handed to her. Yes, reminded ASML’s Jan Vanoppen, this particular wafer had been exposed with an Intel mask. The official opening of the High NA EUV Lab, the facility where chipmakers will take turns probing ASML’s latest-generation EUV tool, took place in an amicable atmosphere.

The mini-pilot line in Veldhoven is a novelty. Previously, a new type of scanner was installed in Imec’s cleanroom in Leuven as soon as possible. To speed up process development work, this time around the research institute took to Veldhoven, bringing a small collection of essential chipmaking tools with it.